Listing 1 ****************************************************************** * SPI Interface to MAX541 * * Controller: 68HC912B32 * Monitor: D-Bug12 * * 03/02/2001 Chad L. Olson ****************************************************************** * Equates ****************************************************************** SP0CR1 equ $00D0 ;SPI Control Register 1 SP0CR2 equ $00D1 ;SPI Control Register 2 SP0BR equ $00D2 ;SPI Baud Rate Register SP0SR equ $00D3 ;SPI Status Register SP0DR equ $00D5 ;SPI Data Register PORTS equ $00D6 ;Port S Data Register DDRS equ $00D7 ;Port S Data Direction ;Register BIT4 equ %00010000 BIT6 equ %01000000 BIT7 equ %10000000 ****************************************************************** * External Variables ****************************************************************** XDEF Main ****************************************************************** * Main Program ****************************************************************** Main: bsr Init Function: bsr RampDown bsr RampUp bra Function ****************************************************************** * Initialization ****************************************************************** Init: bset PORTS, #BIT7 ;Set SS line high to prevent ;glitch movb #$E0, DDRS ;MOSI, SCK, /SS = outputs movb #$00, SP0BR ;SCK = 4MHz movb #BIT4, SP0CR1 ;CPOL, CPHA = 0 ;SPI to Master ldaa SP0SR ;clear SPIF Flag (1 or 2) ldaa SP0DR ;clear SPIF Flag (2 of 2) bset SP0CR1, #BIT6 ;Enable the SPI (SPE=1) rts ****************************************************************** * RampUp * Outputs $0000 to $FFFF Through the SPI Interface ****************************************************************** RampUp: ldx #$0000 RampUpNext: xgdx bclr PORTS, #BIT7 ;Clears /SS selecting MAX541 staa SP0DR ;write most significant byte bsr WaitForSPI stab SP0DR ;write least significant byte bsr WaitForSPI bset PORTS, #BIT7 ;Sets SS latching data into ;the MAX541 xgdx inx bne RampUpNext rts ****************************************************************** * RampDown * Outputs $FFFF to $0000 Through the SPI Interface ****************************************************************** RampDown: ldx #$0000 RampDownNext: dex xgdx bclr PORTS, #BIT7 ;Clears /SS selecting MAX541 staa SP0DR ;write most significant byte bsr WaitForSPI stab SP0DR ;write least significant byte bsr WaitForSPI bset PORTS, #BIT7 ;Sets SS latching data into ;the MAX541 xgdx cpx #$0000 bne RampDownNext rts ****************************************************************** * WaitForSPI * Tests the status of the SPIF bit in the SP0SR register. * This bit is set by the HC12 when the SPI interface has * finished clocking out its data. After SPIF is set * WaitForSPI returns. ****************************************************************** WaitForSPI: brclr SP0SR, #BIT7, WaitForSPI rts ******************************************************************